ASIC RTL Engineer, Silicon
Job Description
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.
- Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as low-power design techniques.
Preferred qualifications:
- Master's or PhD degree in Electrical Engineering, Computer Engineering, or Computer Science.
- Experience with a scripting language like Perl or Python.
- Experience with ASIC or FPGA design verification, synthesis, timing/power analysis, and DFT.
- Knowledge of high-performance and low-power design techniques, assertion-based formal verification, FPGA and emulation platforms, and SOC architecture.
- Knowledge of memory compression, fabric, coherence, cache, or DRAM.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be a part of the team which designs the SoC and Subsystem. You will be working through all phases of design and implementation. You will be working with architects to come up with microarchitecture specifications. You will use your logic design skills to convert the micro-arch into System Verilog code. You will be involved in Power, Performance and Area (PPA) experiments/prototyping experiments early on to optimize PPA. You will also work closely with the verification team to verify the features implemented in design. You will also work with the Physical Design (PD) team to take the design through the PD cycle and eventual tape-out.
Responsibilities
- Define the block-level design document (e.g., interface protocol, block diagram, transaction flow, pipeline, etc.).
- Perform RTL coding, function/performance simulation debug, and Lint/CDC/FV/UPF checks.
- Participate in test plan and coverage analysis of the block and ASIC-level verification.
- Communicate and work with multi-disciplined and multi-site teams.
About us
Google’s mission is to organize the world‘s information and make it universally accessible and useful.
Since our founding in 1998, Google has grown by leaps and bounds. From offering search in a single language we now offer dozens of products and services—including various forms of advertising and web applications for all kinds of tasks—in scores of languages. And starting from two computer science students in a university dorm room, we now have thousands of employees and offices around the world. A lot has changed since the first Google search engine appeared. But some things haven’t changed: our dedication to our users and our belief in the possibilities of the Internet itself.