You have a passion for modern, complex processor architecture, digital design, and RTL design in general. You are a team player who has excellent communication skills, responsible and willing to pick new skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBLITIES:
-Understanding architecture specifications requirements and completing all duties assigned by the Supervisor.
-Able to work well inside team/cross functional team.
-Collaborate and communicate with team members to understand task that require to deliver.
-Run design flows, simulations and regression management.
-Perform first level debug test/design errors to determine the root cause.
-Suggest fixes and solutions to test/design errors
-Develop scripting for daily task execution efficiency improvement.
PREFERRED EXPERIENCE:
Knowing system Verilog, verilog , Perl, TCL, Phython is a plus.
ACADEMIC CREDENTIALS:
Bachelor’s or Master’s in Electrical & Electronics engineering, Mechatronics, or comparable disciplines
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