Sr. HW Engineer (SI simulation 訊號模擬) - (25000R)

Purpose of this Position

深入研究高速訊號，在高速硬體電路Signal Integrity上提供最佳設計且確保生產品質

Major Areas of Responsibility

專案研發

• Perform high speed signal integrity simulation including 10G/40G、25G/100G、PCIE、SATA、DP、USB、DDR3/DDR4/DDR5.
• Perform pre-layout, layout constraint, and post-layout simulation processes.
• PCB stackup design and layout review for high speed signal and PDN.
• Build component models to ensure the correlation between SI/PI simulation and measurement.
• Solid SI experience in resolving technical issues and performing detailed analysis.

團隊合作

• Collaborating with EE teams to refine high-speed signal performance.
• Collaborate with the layout engineer to provide clear layout guidelines and enhance footprint optimization.

Minimum Job Requirements

Education:研究所(含)以上    
Experience:

• Must have an MS in EE related field.
• More than 3 years experience of SI/PI field
• Experience with signal and power integrity analysis tools (ex: Ansys HFSS, Ansys SIWAVE, Cadence Clarity, Cadence Sigrity, Keysight ADS, Intel ICAT etc).
• Experience with Intel chip design, including knowledge of related technologies and specifications.
• Comprehensive knowledge of SI/EMI/EMC/Transmission Line theory and applications.
• Skilled in Allegro constraints and tools.
• Experience with measurement equipments (ex: TDR, VNA) is a plus.
• Experience with Matlab, Python, or C for simulation automation is a plus.

Language: 中文、英文

Required Competencies

• 負責、主動、誠實、熱忱,、有執行力，具有很好的跨部門溝通協作及團隊合作能力。
• 有能力獨立完成問題分析、確認及提出解決方案解決問題。
• 學習能力強、有良好的邏輯判斷能力。

請至Moxa四零四科技官方招募網站，搜尋職務關鍵字：25000R，點選「線上應徵」，投遞您的履歷。收到的履歷將有一段評估時間，如有進一步的消息，敝公司將主動與您聯繫，謝謝您的應徵與配合。

【Moxa四零四科技官方招募網站連結】
https://tas-moxa.taleo.net/careersection/mx_ext/jobsearch.ftl?lang=zh_TW