Engineer / Senior Engineer, Physical Design (ASIC Place & Route) (San Jose, CA) (7429)

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Job updated 23 days ago
The employer was active about 11 hours ago

Job Description

Overview of Role

As a Physical Design Engineer, you will be responsible for the entire APR implementation flow from RTL-to-GDS that includes synthesis, floorplan, place and route, CTS, STA, and signoff. You will be reporting to Senior Manager at San Jose Center and joining a team of engineers dedicated to pushing the envelope for the world’s leading semiconductor company. We are currently operating in a hybrid work schedule with 4 days in office.

Responsibilities

• Complete entire physical implementation of the block level and tapeout production chip

• Block level floorplan with the ability to analyze the quality of the floorplan

• Customized Clock tree structure and Place & Route

• Implement ECOs for timing closure

• Signal EM/Noise and Power IR/EM analysis and fix

• DRC/LVS/ERC/ANTENNA analysis and clean up

• Physical verification sign off

Minimum Qualifications

• Master’s degree in Electrical/Computer Science Engineering

• Netlist (or RTL)-GDS physical implementation experience

• In depth knowledge of major EDA tools/design flows

• Experience with TSMC N16 or below technology

• Experience in block level implementation or chip integration and signoff

• Experience in Perl/TCL language programming

• Ability to work regularly at a Customer site in the South Bay Area.

Preferred Qualifications

• TSMC N5 and below technology

• Low-power implementation methodology

• Advanced timing signoff methodology

• Able to independently complete Netlist-GDS P&R, signoff task

• Proven record in multi-million gate design production tapeouts

Company Description

As a trusted technology and capacity provider, TSMC is driven by the desire to be:

• The world’s leading dedicated semiconductor foundry

• The technology leader with a strong reputation for manufacturing excellence

• Advancing semiconductor manufacturing innovations to enable the future of technology

TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and a portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world. In North America, TSMC has a strong sales and service organization that works with customers by helping them achieve silicon success with cutting-edge technologies and manufacturing excellence. The Company has continued to accelerate its R&D investment and staffing in recent years and is expanding its manufacturing footprint to support customer innovation with 3D IC technologies and optimal manufacturing capacity.

Diversity statement

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.

TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at [email protected]. TSMC confirms to all applicants its commitment to meet TSMC’s obligations under applicable employment law. Reasonable accommodations will be determined on a case-by-case basis.

For positions requiring access to technical data subject to export control regulations, including Export Administration Regulations, TSMC Technology, Inc. may have to obtain export licensing approval from the U.S. Government for certain individuals. All employment is contingent upon TSMC Technology, Inc. obtaining any export license or other approval that may be required by the U.S. Government.

Pay Transparency / Benefits statement

At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $110,000 and $160,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC’s total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.

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About us

Established in 1987 by Dr. Morris Chang, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2025, the Company manufactured 12,682 different products using 305 distinct technologies for 534 different customers for various applications covering a variety of end markets including high performance computing (HPC), smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics (DCE). Annual capacity of the manufacturing facilities managed by TSMC and its subsidiaries exceeded 17 million 12-inch equivalent wafers in 2025. TSMC operates six 12-inch wafer GIGAFAB® fabs, four 8-inch wafer fabs, and one 6-inch wafer fab – all in Taiwan – as well as two 12-inch wafer fabs at two wholly owned subsidiaries – TSMC Nanjing Company Limited and TSMC Arizona Corporation, one 12-inch wafer fab at a TSMC’s majority-owned manufacturing subsidiary – Japan Advanced Semiconductor Manufacturing, Inc. (JASM), and two 8-inch wafer fabs at two wholly owned subsidiaries – TSMC Washington and TSMC China Company Limited. The Company began construction on a specialty technology fab in Dresden, Germany, in 2024. This facility will manufacture TSMC’s 28/22 nanometer planar CMOS and 16/12 nanometer FinFET process technologies.

Outside of Taiwan, TSMC provides customer support, account management and engineering services through its offices in North America, Europe, Japan, China, and South Korea.