伺服器FPGA/CPLD研發工程師

1. FPGA Development for server or communication applications , including IC design , Verilog coding , Simulation , Timing closure , Debug and Project maintenance.

2. Validate and Debug FPGA on prototype hardware system.

3. Co-work with Hardware and Software engineers in development.

4. Design tools implementation

1. 學歷科系：大學以上，電子/電機/計算機相關科系.

2. 工作經驗：無工作經驗可，有PC相關設計經驗者尤佳

3. 專業能力：需具備Verilog coding能力，熟 Logic Analyzer, Scope, shell script, Perl, Python經驗佳

4. 語文要求：TOEIC 500

5. 其他需求：可接受出差

6. 工作待遇：依公司核薪標準