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About the Role: FPT Telecom is building the next generation of Edge AI computing solutions. We are looking for a highly skilled FPGA Engineer with specialized experience in AI Acceleration using AMD/Xilinx Versal ACAP architectures. In this role, you will bridge the gap between AI algorithms and hardware execution, developing high-performance, low-latency, and power-efficient AI accelerators for AI Server. Key Responsibilities: AI Hardware Deployment: Compile and deploy AI models (CNNs, Transformers) from frameworks (PyTorch/TensorFlow) to FPGA/SoC hardware using Vitis AI.AI Engine (AIE) Programming: Design, implement (in C/C++), and optimize parallel computing algorithms onto the AI Engine array of Xilinx Versal devices.Dataflow Optimization: Architect high-throughput data movement between Programmable Logic (PL), Processing System (PS), and AIE using AXI-Stream, DMA, and Network-on-Chip (NoC).System Integration: Collaborate with AI Engineers for model quantization (INT8/FP16) and HW Engineers to integrate custom pre/post-processing blocks (Verilog/HLS) into the system.Verification Profiling: Perform hardware-in-the-loop testing, bottleneck analysis, and profiling using Vitis Analyzer on actual evaluation boards.

We are seeking a PCB Hardware Design Engineer to participate in the design, development, and testing of FPGA-based signal processing systems for defense applications.Key responsibilities: Designing signal processing boards using Xilinx RFSoC Gen3 with integrated high-speed ADC/DAC. Developing schematics and multi-layer PCB layouts in compliance with VPX military/industrial standards. Integrating high-speed interfaces such as Ethernet, JESD204B/C, PCIe, UART, USB, CAN, I2C, RS422, RAM, and Flash memory. Designing power architecture, including power trees and power supply circuits for FPGA systems (Power Management, Switching Regulators, LDOs, etc.). Creating and managing BOMs, and working with manufacturers to ensure product quality and fabrication/assembly readiness. Collaborating closely with system, FPGA, embedded software, and mechanical teams to ensure cohesive design integration. Participating in board bring-up, signal validation, performance evaluation, and debugging using tools such as oscilloscopes, logic analyzers, and DMMs. Supporting final system integration, field testing, troubleshooting, and performance optimization. 1. BE A CHIP MAKER - NOT JUST A CODER Full-Flow Ownership: Take ownership of the entire design lifecycle. You will not just write code; you will work closely with Architecture, DV, PD, DFT, and Power teams to bring a Large-Scale SoC from concept to Tape-out. Cutting-Edge Tech: Work on advanced ASIC IP-based architectures for AI Smart Camera applications. Handle sophisticated sub-systems and internal/external IP integration. Impactful Work: Develop methodology, flows, and checks that ensure our chips deliver the highest quality and efficiency (TOPs/Watt). 2. TOP-TIER BENEFITS CARE Competitive Package: Attractive salary + 13th-month salary + Performance-based bonuses. Premium Healthcare: Exclusive FPT Care insurance package (covering you and your family) with access to top international hospitals. Annual high-quality health check-ups. Work-Life Balance: Full compliance with Labor Law, generous leave policies, and care for employees' spiritual lives. 3. DYNAMIC ENVIRONMENT GROWTH Vibrant Culture: Join a friendly, open team with the unique "STCo" culture. Enjoy exciting activities: Teambuilding, Company Trips, Talent Shows (Sao Choi), Festivals, and more! Career Path: Clear roadmap for promotion and technical development. Work with modern facilities and high-quality equipment. Exclusive Perks: Special discounts on FPT Telecom FPT ecosystem services.

We are seeking a PCB Hardware Design Engineer to participate in the design, development, and testing of FPGA-based signal processing systems for defense applications. Key responsibilities: Designing signal processing boards using Xilinx RFSoC Gen3 with integrated high-speed ADC/DAC.Developing schematics and multi-layer PCB layouts in compliance with VPX military/industrial standards.Integrating high-speed interfaces such as Ethernet, JESD204B/C, PCIe, UART, USB, CAN, I2C, RS422, RAM, and Flash memory.Designing power architecture, including power trees and power supply circuits for FPGA systems (Power Management, Switching Regulators, LDOs, etc.).Creating and managing BOMs, and working with manufacturers to ensure product quality and fabrication/assembly readiness.Collaborating closely with system, FPGA, embedded software, and mechanical teams to ensure cohesive design integration.Participating in board bring-up, signal validation, performance evaluation, and debugging using tools such as oscilloscopes, logic analyzers, and DMMs.Supporting final system integration, field testing, troubleshooting, and performance optimization.

About the Role:We are looking for a strategic FPA professional to lead our corporate financial controlling and consolidation. In this role, you will move beyond functional modeling to focus on high-level PL governance. As the primary gatekeeper for the company’s financial performance, you will ensure that all forecasts and initiatives submitted by Functional BI teams are accurate, integrated, and fully aligned with our corporate financial targets.PL Governance Controlling: Serve as the final reviewer for all forecasts and cost-optimization initiatives. You will be expected to challenge functional assumptions and ensure every submission is grounded in the broader company strategy.Corporate Consolidation: Lead the end-to-end consolidation of financial inputs. You will own the integrity of the total company PL, synthesizing functional data into a cohesive executive-level overview.Target Management Gap Analysis: Establish top-down targets and monitor the variance between bottom-up projections and corporate goals. You will lead the bridge conversations and identify systemic risks or opportunities that impact multiple departments.Performance Storytelling: Translate month-end results into high-level executive summaries. You will also define the standard reporting frameworks and timelines that Functional BI teams must follow to ensure consistency across the organization.