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Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.Job Overview As a Firmware Engineering Director/ Manager, you will lead and scale firmware development efforts for Astera Labs’ SoC and systems products used in data-center and AI infrastructure. You will be responsible for technical direction, people leadership, and execution across core firmware, bare-metal software, and device driver development. Firmware is a first-class differentiator at Astera Labs. In this role, you will build, mentor, and guide high-performing firmware teams while partnering closely with hardware, silicon architecture, validation, product, and customers to ensure successful delivery of complex firmware programs. This role supports two leadership levels: Firmware Engineering Manager Firmware Engineering Director Key Responsibilities Own the firmware execution strategy across one or more SoC or systems programs, ensuring alignment with product and silicon roadmaps. Lead and manage firmware teams responsible for bare-metal firmware, RTOS-based firmware, and device drivers. Provide technical oversight and architectural guidance without being the primary implementer. Partner closely with hardware architecture, RTL design, validation, and systems teams to define HW/SW interfaces, development milestones, and integration plans. Drive SoC bring-up readiness, firmware validation strategy, and risk mitigation across pre-silicon and post-silicon phases. Establish development processes, coding standards, and quality metrics to ensure predictable and scalable execution. Support customer engagements as needed, including escalation handling, technical reviews, and roadmap alignment. Communicate status, risks, and tradeoffs clearly to executive leadership and cross-functional stakeholders. Director scope: own multi-team delivery, long-term roadmap planning, hiring strategy, and cross-org alignment across multiple product lines. Firmware Domains Under Management Teams under this role may span one or more of the following areas: PCIe Firmware: PCIe switch and controller firmware (Gen3+), including link training, enumeration, error handling, and performance optimization. Ethernet Firmware: Embedded firmware for high-speed Ethernet systems (100G–400G+), including PHY/MAC interaction and link bring-up. UCIe / Chiplet Firmware: Firmware for chiplet-based SoC architectures, including die-to-die interconnect initialization and advanced packaging enablement. Required Experience Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science. 10+ years of experience developing or supporting firmware for SoC, silicon, or systems products in compute, networking, or storage domains. 5+ years of experience in a people-management role, leading firmware or low-level software teams. Strong understanding of bare-metal firmware, RTOS environments, and firmware development lifecycles. Experience managing teams working on complex SoCs and high-speed interfaces such as PCIe, Ethernet, DDR, NVMe, or similar. Proven ability to lead execution across ambiguous, fast-moving environments with multiple stakeholders. Strong communication skills, executive presence, and customer-facing professionalism. Authorization to work in the U.S. Preferred Experience Prior experience managing firmware teams delivering PCIe or Ethernet switch products. Experience with UCIe, chiplet architectures, or advanced packaging ecosystems. Track record of scaling teams through hiring, onboarding, and mentorship. Experience working with or supporting customers during bring-up, deployment, or escalations. Participation in industry ecosystems such as OCP or OpenBMC. Director level: experience owning multi-program delivery, long-term technical roadmaps, and cross-functional organizational planning. This position can be hired as aSenior Manager Level or Director Level.The base salary range is $230,000 USD – $265,000 USD. Your base salary will be determined based on location, experience, and employees' pay in similar positions. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.Role SummaryWe are seeking a technically strong Chief of Staff to the Head of Engineering who will also lead Engineering Program Management across Silicon Engineering. This role is a force-multiplier for Engineering leadership — driving org scale, decision velocity, and execution rigor. The ideal candidate brings deep technical fluency, structured problem-solving, and the ability to drive outcomes through influence rather than hierarchy. The role is fully in person in San Jose. Responsibilities — What You Will Own 1) Chief of Staff to Head of Engineering • Drive operational cadence: engineering all hands, staff meetings, agenda/material prep, tech talks, university engagements, action follow-through, and leadership syncs.• Frame and resolve high-leverage decisions — proactively surface blockers (technical, operational, organizational) before they escalate.• Manage escalations and organizational friction — diagnose root causes, coordinate resolution paths, and ensure durable fixes.• Partner cross-functionally with Hardware, Product, and Quality teams to ensure clarity of communication, alignment on priorities, and disciplined follow-through on decisions.• Support org design, headcount planning, and hiring prioritization for engineering teams.• Maintain alignment across functions through clear messaging and communication, validate exitance and validation of processes• Navigate org dynamics, build trust, and constructively challenge assumptions; maintain psychological safety.• Support the head of engineering with administrative and org related activities 2) Lead ASIC Tape out Management (Silicon Programs) • Status management — collect and track status across functions contributing to ASIC tapeouts.• Milestone tracking — maintain methodology checklists and boundary agreements to ensure schedule adherence.• IP and vendor tracking — own visibility into IP deliveries, version inventory, vendor issues, and escalation loops.• Quality documentation — monitor quality KPIs, ensure engineering documentation completeness.• Requirements tracking — ensure PRDs/features are captured, tracked, baselined.• Resource monitoring — track compute, hardware, storage consumption and thresholds.• Internal reporting — generate status reporting for Silicon Engineering leadership. 3) Influence Without Authority • Drive cross-engineering outcomes through credibility, clarity, and follow-through — not hierarchy.• Create order in ambiguous spaces; shape scope where it is undefined. Qualifications • 10+ years in semiconductor/SoC/ASIC or adjacent high-complexity engineering environment (e.g., CPU/IP/System companies).• Proven success in Chief of Staff, Staff Program Manager, TPM Director, or similar technical leadership-enablement role. • Strong technical acumen — able to understand engineering trade-offs and make decisions with limited information, challenge assumptions, and earn credibility with senior ICs.• Demonstrated experience running program cadence for complex silicon programs (tapeout, IP integration, etc.).• Proven ability to organize complex workflows and drive consistent follow-through.• High EQ and organizational awareness; can navigate tension and align diverse viewpoints.• Exceptional written/verbal communication, structured thinking, and execution discipline.• Prior experience in leading RTL2GDSII chip design is a huge plus. What Success Looks Like • Engineering leadership spends more time on strategic and technical decisions, less on coordination.• Milestones hit with fewer escalations and clearer accountability.• Status, risks, and decisions are crisp — never ad hoc or late.• Teams feel supported, not policed — trust increases, friction decreases without compromising on accountability .• Ambiguity decreases over time as clarity and execution rhythm scale with the org. Salary range is $216,000 to $300,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.Job Description  We are seeking a ASIC Design Engineering Director / Sr. Manager to lead the microarchitecture, RTL implementation, and front-end development of high-performance connectivity solutions for next-generation network controllers. The ideal candidate has deep expertise in front-end ASIC design, strong leadership experience, and a solid understanding of communication and interface standards such as PCIe, Ethernet, UALink.This role requires on-site presence. Basic Qualifications:  Bachelor’s degree in Electrical or Computer Engineering required; Master’s degree preferred. 12+ years of experience developing or supporting complex SoC/silicon products for server, storage, or networking applications. 5+ years of technical leadership or engineering management experience. Strong professional presence with the ability to manage multiple priorities, prepare for and lead customer discussions, and operate independently with minimal supervision. Entrepreneurial, open-minded, and action-oriented mindset with a strong customer focus. Authorized to work in the U.S. and able to start immediately. Required Experience:  Strong front-end design expertise in high-speed digital logic design in ASICs/SOCs, including architecture, RTL development, simulation, synthesis, timing closure, GLS, and DFT. Hands on experience in guiding and mentoring design engineers throughout the chip front end development hands-on experience in Micro architecture and timing closure for high-speed logic design ( 1-2GHz) in advanced process nodes Hands-on experience and working knowledge of Ethernet or UALink and Familiarity with other high-speed interconnect protocol Proven experience with packet/cell based high-speed switching architectures, cross bars, and high-speed interconnects. Demonstrated ownership of full-chip or block-level development from architecture through GDS, delivering multiple complex designs into production, working closely with both hardware and software teams. Experience with Cadence and/or Synopsys digital design and DFT flows Expertise in IP/SOC integration Expertise in silicon bring-up, performance tuning, and lab debug Preferred Experience:  Proficiency in scripting languages such as Python or equivalent. Background in developing ASIC design methodologies and driving methodology adoption across teams. This position can be hired as a Senior Manager Level or Director Level.The base salary range is $230,000 USD – $265,000 USD. Your base salary will be determined based on location, experience, and employees' pay in similar positions.We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.As a Photonics Integrated Circuit (PIC) Design Engineering, Tech Lead / Director, you will work on the conception, design, simulation, tape-out and measurement of photonic integrated circuits in various semiconductor processes. Location: San Jose, CA AND Aachen, North Rhine-Westphalia, Germany We have several open positions with different focus and seniority levels: Electro-optic modulator and passive photonic component design Chip-level integration Control system development Thermal and RF modeling Test and characterization Basic Qualification: PhD or MS degree in Electrical Engineering, Applied Physics, or Physics is preferred. 10 - 15+ years of relevant experience, depending on the seniority level of the position, is preferred. Desired Experience: Deep understanding of photonic devices and circuits preferably in the context of high-speed optical communications. Experience in design, simulation, layout, and measurement of integrated photonic devices and circuits. Understanding of semiconductor fabrication and packaging flows. Knowledge of electronic circuits that interface with photonic devices and integrated circuits is a plus. Relevant research publications and/or patents in photonics. Depending on the focus of the position, a subset of the following applies: Familiarity in simulation and layout tools for photonic devices and integrated circuits. Familiarity with RF and thermal simulation tools. Experience with the development of control systems for photonic devices and systems. Experience with chip-level integration. For all positions, we expect: Familiarity in programming/scripting languages such as Python, Matlab, or C. Strong technical independent contributor with a proven ability to drive results. Excellent teamwork, presentation, and documentation skills. Ability to collaborate with global teams across multiple time zones and deliver under pressure with strict deadlines. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Logitech is the Sweet Spot for people who want their actions to have a positive global impact while having the flexibility to do it in their own way.The RoleWe are seeking a highly experienced Principal Software Technical Program Manager (TPM) tolead and own complex, software-driven programs across the full Software Development Lifecycle (SDLC) for Video Conferencing products. This role operates at the intersection of embedded software, Android/Linux system software and cloud services.As a senior software program leader, you will drive end-to-end software execution from concept through launch and post-deployment ensuring strong technical alignment across Software Engineering, Product Management, Quality Engineering, and Operations. You will be accountable for software delivery outcomes, execution rigor, and cross-functional alignment required to ship high-quality, scalable products at enterprise scale. This role demands deep software technical understanding, excellent communication, and the ability to lead through influence, clarity, and decision-making across global teams.Your ContributionAs a Principal Software Lead and software execution leader, you will:● Lead large-scale, multi-disciplinary software programs spanning firmware, embeddedLinux/Android system software, and cloud-connected services.● Act as the single point of ownership for software program execution, ensuring alignment across Software Engineering, Product Management, Program Management, and Quality Engineering.● Drive clarity of scope, requirements, dependencies, risks, and delivery timelines, holding teams accountable to commitments.● Establish and enforce strong planning, execution, and tracking frameworks, including Jira workflows and operational metrics.● Translate complex technical topics into clear executive-level updates, enabling informed decision-making.● Proactively identify risks, drive mitigation strategies, and resolve execution blockers to maintain schedule, quality, and software readiness.● Champion operational excellence by continuously improving software development processes, communication, and cross-team execution models.Key ResponsibilitiesSoftware Program Leadership Execution● Lead cross-functional execution across firmware, embedded Linux, Android platform engineering, cloud/backend services and QA.● Drive software roadmap alignment, engineering readiness, milestone planning, and release execution.● Own trade-off decisions across scope, schedule, and quality, with a strong bias toward long-term software sustainability and product quality. Planning, Tools, and Process Excellence● Define and maintain Jira workflows, dashboards, boards, and reporting structures forhighly complex, multi-team software programs.● Implement scalable, repeatable execution processes that support distributed global teams.● Establish clear operating rhythms (planning, execution, reviews, and retrospectives) to ensure predictable delivery.Technical Leadership Problem Solving● Maintain a system-level understanding of software architecture for hardware devices running embedded Linux/Android and cloud-connected services.● Engage deeply with architects and senior engineers to validate feasibility, sequencing, and technical risk.● Drive resolution of cross-layer issues spanning hardware, system software, applications, and cloud services.● Ensure engineering quality, integration readiness, and software stability throughout the development lifecycle.Required Qualifications:●10 years of experience in Technical Program Management or Software Program Leadership delivering complex, software-intensive products at scale.● Proven track record of shipping embedded Linux, Android-based, and/or cloud-connected devices.● Strong understanding of hardware-software co-development, including EVT/DVT/PVT cycles and manufacturing readiness (highly desirable).● Expert-level proficiency with Jira, Confluence, and modern program management tools.● Exceptional written and verbal communication skills, with the ability to operate effectively at both engineering and executive levels.● Demonstrated ability to lead through influence, drive alignment, and make decisions in highly ambiguous environments.● Experience leading global, multi-time-zone teams and complex cross-organizational initiativesCompensation:This position offers an annual base salary typically between $ 141,000- $220,000.In certain circumstances, higher compensation will be considered based on the business need, candidate experience, and skills.  #LI-SN1  Across Logitech we empower collaboration and foster play. We help teams collaborate/learn from anywhere, without compromising on productivity or continuity so it should be no surprise that most of our jobs are open to work from home from most locations. Our hybrid work model allows some employees to work remotely while others work on-premises. Within this structure, you may have teams or departments split between working remotely and working in-house.Logitech is an amazing place to work because it is full of authentic people who are inclusive by nature as well as by design. Being a global company, we value our diversity and celebrate all our differences. Don’t meet every single requirement? Not a problem. If you feel you are the right candidate for the opportunity, we strongly recommend that you apply. We want to meet you!We offer comprehensive and competitive benefits packages and working environments that are designed to be flexible and help you to care for yourself and your loved ones, now and in the future. We believe that good health means more than getting medical care when you need it. Logitech supports a culture that encourages individuals to achieve good physical, financial, emotional, intellectual and social wellbeing so we all can create, achieve and enjoy more and support our families. We can’t wait to tell you more about them being that there are too many to list here and they vary based on location.All qualified applicants will receive consideration for employment without regard to race, sex, age, color, religion, sexual orientation, gender identity, national origin, protected veteran status, or on the basis of disability.If you require an accommodation to complete any part of the application process, are limited in the ability, are unable to access or use this online application process and need an alternative method for applying, you may contact us toll free at 1-510-713-4866 for assistance and we will get back to you as soon as possible.

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.Do you live, breathe and dream products? Are you passionate about leading the transformation of products from prototype to mass production? Are you thrilled by seeing the product you worked on succeed in the market? If so - we may be looking for you! Role Overview The Engineering Program Manager – Ethernet AEC Products leads cross-functional execution required for development, qualification, NPI, RTM (release to manufacturing) and sustaining phase of Astera Labs’ Ethernet AEC products. This is a high-impact position that is directly responsible for successful execution of critical revenue goals. Key Responsibilities Be the single point of contact within Astera for all matters relating to Ethernet AEC programs including Firmware, Boards and AEC Cables. Own the delivery of Ethernet AEC products across the full lifecycle from concept through production and lead sustaining phase activities: Align activities across various disciplines to ensure customer needs are met Board: spec, design, build qty. planning, EVT/DVT/PVT AEC cable: spec, design, build qty. planning, EVT/DVT/PVT, customer qualification, ramp AEC FW release roadmap and delivery to customers, prioritization of feedback/issues Manage ODM/CM and supplier relationships, including qualification and ramp readiness Maintain adequate technical depth and managerial skills to address program and product issues Program planning, schedules, budgeting, risk assessment, resource planning and management, and tracking related program activities Manage multiple parallel threads of execution while clearly identifying and tracking dependencies Identify risks and bottlenecks and actively work on resolving them Review, disposition and communicate changes in scope / schedule / expense Conduct regular meetings to ensure cross-functional teams are clear on expectations and problem-solving actions are in place to address issues in a timely manner Be the champion of your programs and maintain management and key stakeholder alignment Actively contribute to organizational development and process improvement initiatives Qualifications: Bachelors’ or Masters’ Degree in Electronics/Electrical/Computer Engineering 5–8 years of total professional experience, 3–5+ years in Technical Program Management, Hardware Program Management, or equivalent Experience delivering hardware products from concept to production Working knowledge of high-speed interconnect technologies, Active Electrical Cables (AEC), DACs, optics, or related systems; PCIe, Ethernet, SerDes, or similar interfaces Knowledge of modern datacenter interconnect technologies such as Ethernet, InfiniBand and PCIe is a plus Experience working with external vendors, ODMs, or CMs Program management and analytical skills, ability to organize information for internal and external consumption Technical appreciation of ASIC and Hardware engineering flows (front end and backend development processes, product and test engineering, char and validation, hardware/firmware/software design) Working knowledge Atlassian Tools and JIRA Scrum Methodologies as well as using work breakdown structure to identify objectives and milestones. Working knowledge of Microsoft Project and other program management tools Strong ability to operate in ambiguous, fast-moving environments Able to motivate and energize teams and lead by influence in a matrixed organization Strong communication skills and the ability to keep calm and make progress in high stress situations Ability to travel to Astera Labs’ and manufacturing sites as required Proficiency in Mandarin or other languages is a plus, particularly for working with global suppliers and partners Salary range is $160,000 to $195,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.Astera Labs is seeking an exceptional Senior Director System Validation to lead our AI Fabric Validation organization. Connectivity is a critical component of every AI accelerator deployment and hyperscale data center architecture. As part of the AI Fabric Engineering group, you will play a key role in ensuring that Astera Labs’ fabric solutions perform at scale and deliver system-level performance across the most demanding AI and ML workloads. This role offers a unique opportunity to shape validation strategy for cutting-edge connectivity silicon and gain deep insight into next-generation AI infrastructure platforms. Your primary responsibility will be to build and lead a world-class validation organization tasked with validating all silicon, firmware, and system-level solutions at scale, ensuring performance, reliability, and production readiness across customer deployments. Job Description Seeking a strong technical leader who has delivered multiple SoC products. Lead and scale the system validation organization for Astera Labs' AI fabric portfolio, building a high-performing team across multiple concurrent product programs. Understand the performance and functionality requirements of our AI fabric switches to enable customers to develop Data Center systems using Astera Labs' connectivity products for AI and ML applications. Own comprehensive validation strategies for AI fabric switch products. Drive execution through scalable automation platforms and data-centric testing with automated reporting and specification compliance verification. Collaborate cross-functionally with Architecture, Hardware, Firmware, and Software teams to influence product requirements and ensure validation excellence. Ensure timely bring‑up of new silicon and platforms, driving root‑cause analysis and cross‑functional debug of hardware, firmware, and system issues. Deliver high‑confidence validation results that support product qualification, customer sampling, and mass production readiness. Engage directly with key customers to understand their requirements and highlight the unique capabilities of Astera Labs' solutions. The ideal candidate brings deep expertise in silicon/system validation, a strong architectural mindset, and a proven ability to scale organizations in fast‑moving, high‑performance computing environments. Work closely with silicon design, architecture, Firmware, software engineering teams to ensure cohesive validation strategies. Drive a culture of technical excellence, accountability, and continuous improvement. Manage resource planning, and vendor/partner relationships. Basic Qualifications Strong academic background in Electrical or Computer Engineering. Bachelor's required, Master's preferred. ≥15 years' experience supporting or developing complex SoC/silicon products for Server, Storage, Networking applications and high‑performance hardware companies. ≥5 years hands-on experience with Silicon/System bring-up, validation, and debug, including in customer systems. ≥5 years building high performance Engineering teams and validation methodologies. Deep understanding of CPU, GPU, SoC, or AI/ML accelerator architectures, including memory subsystems, I/O, power management, and firmware interactions. Expertise in validation methodologies: pre‑silicon simulation/emulation, post‑silicon bring‑up, system validation, stress testing, and performance characterization. Strong background in debug methodologies, lab infrastructure, and automation frameworks. Excellent communication skills and ability to influence executives and cross‑functional partners. Entrepreneurial, open-minded behavior and can-do attitude. Think and act with the customer in mind! Preferred Experience ≥8 years leading validation teams planning, execution and maintaining project visibility. ≥10 years hands-on experience with Silicon/System bring-up, validation, and debug, including in customer systems. Thorough knowledge of high-speed protocols like PCIe, CXL, NVMe, or Ethernet. Deep understanding of High-Speed Signaling Principles and x86/ARM architecture, UEFI/Linux boot sequence. The base salary range is $240,000 USD - $300,000 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.As aSenior Software Diagnostics Engineer onthe Astera Labs Hardware Engineering team you will be responsible for building diagnostics and manufacturing software to allow design, test, and manufacture of cutting-edge high-speed datacenter products. You will be working on a project from conception to the final production stage at contract manufacturer. The role requires a strong and broad software background and a good understanding of hardware design and manufacturing practices. At the same time, we welcome candidates with deep experience in smaller areas and desire to learn. Depending on your experience, you may be focusing on design/validation or automation/manufacturing. Key Responsibilities: Design, implement test production-grade diagnostics for high-speed digital boards and ASICS to help with hardware validation. Design, implement test manufacturing tests to validate mass production of digital boards used in data center networking product Bring-up newly manufactured boards and port the first level of software. Isolate and perform root-cause analysis of reported failures Support new platform software and hardware features Coordinate with the hardware engineering team on bring-up schedules and feature delivery Participate proactively in design discussions, design review and project management Basic Qualifications Bachelors in Computer Science/Computer Engineering or equivalent experience. Knowledge of modern software development Proficiency in Python, C or similar Ability to work cross-functionally in a fast-paced, highly technical environment. Required Experience 2+ years of Experience in subset of diagnostics, hardware bring-up, test or manufacturing automation Strong debugging skills across hardware, firmware, and system layers Preferred Experience/Nice to Have Experience working with datacenter-level complex electronic equipment bring-up/diagnostic/manufacturing Ability to read schematic/layout System debug experience Embedded programming and good knowledge of OS internals (Linux/Unix) Has knowledge of common interconnecting buses and interfaces such as PCIe, I2C, XAUI, 10G Ethernet drivers, FPGA, Switch chips, SSL offload, TCAM programming. Experience with DDR5 The base salary range is $120,000 - $195,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.About Astera Labs Astera Labs (NASDAQ: ALAB) is a pioneering fabless semiconductor company headquartered in Silicon Valley, driving the evolution of AI and cloud infrastructure through purpose-built connectivity solutions. As a leader in rack-scale architecture, Astera Labs is enabling the shift to AI Infrastructure 2.0, where compute is optimized at the rack level to support the demands of next-generation workloads. Our portfolio includes high-performance silicon, software, and system-level solutions that address critical bottlenecks in data movement across compute, memory, and networking domains. Leveraging technologies such as PCIe®, CXL®, Ethernet, and UALink™, we deliver scalable, interoperable platforms that empower hyperscale data centers to deploy AI and cloud services with greater efficiency and flexibility. We are committed to open standards, software-defined architectures, and continuous innovation as we work to expand our product offerings and customer engagements. We foster a collaborative environment for professionals passionate about solving complex challenges and shaping the future of intelligent infrastructure. Role Overview Astera Labs is seeking a strategic and proactive Senior Principal Category Sourcing Manager to lead sourcing initiatives across Corporate Services Operations, a category that spans a broad and dynamic range of enterprise needs. This includes sourcing for professional services (legal, finance, marketing, recruiting, and engineering consulting), IT infrastructure and equipment, corporate software tools, facilities and real estate services, and workplace operations. This role is foundational to enabling enterprise-wide operations and supporting business continuity, compliance, and employee productivity. You will be responsible for developing and executing category strategies, managing supplier relationships, and driving high-impact negotiations across a diverse set of internal stakeholders and external partners. You’ll also play a key role in vendor consolidation, spend governance, and process optimization to support Astera Labs’ rapid growth and evolving business needs. A Day in the Life In this role, you’ll be at the center of enabling Astera Labs’ enterprise operations. Your day is shaped by dynamic interactions across legal, finance, IT, and facilities teams, as you help translate business needs into sourcing strategies that drive efficiency, scalability, and value. You’ll navigate a diverse landscape of suppliers—from strategic consulting firms and software providers to facilities and real estate partners—building relationships and shaping agreements that support both immediate needs and long-term growth. Whether you're refining a framework for professional services sourcing, evaluating new IT platforms, or exploring ways to streamline corporate spend, your work will influence how the company operates and scales. This role offers a unique blend of strategic ownership and cross-functional engagement, where your decisions directly impact business continuity, employee experience, and operational excellence. Key Responsibilities Develop and execute sourcing strategies for corporate categories including professional services, IT infrastructure, facilities, real estate, and enterprise software. Lead supplier selection, negotiation, and contract execution including NDAs, MSAs, SOWs, and licensing agreements. Partner with internal stakeholders to align sourcing initiatives with business needs and operational goals. Drive vendor consolidation and strategic partnerships to improve service levels and reduce cost. Streamline procurement processes for high-volume, low-value purchases and support spend governance improvements. Monitor supplier performance, compliance, and service-level agreements (SLAs). Analyze market trends, cost structures, and supplier capabilities to inform sourcing decisions. Collaborate with logistics and procurement operations teams to support freight rate negotiations and global sourcing initiatives. Basic Qualifications Bachelor’s degree in Business, Supply Chain, Finance, or related field. 7+ years of experience in indirect sourcing, procurement, or supplier management across corporate categories. Proven experience negotiating contracts for professional services, IT infrastructure, facilities, and enterprise tools. Strong understanding of procurement operations, vendor management, and spend governance. Demonstrated ability to lead complex negotiations and manage supplier relationships across global teams. Preferred Qualifications Master’s degree in Business, Supply Chain Management, or related discipline. Experience with sourcing frameworks for legal, consulting, and engineering services. Familiarity with corporate IT tools, SaaS licensing models, and facilities management. Strong analytical, financial modeling, and contract management skills. Excellent communication and stakeholder engagement across technical and business functions. Why Join Us? Be part of a high-growth, innovation-driven company at the forefront of AI and cloud infrastructure. Work with diverse teams and strategic partners across the enterprise. Enjoy a collaborative culture that values ownership, agility, and continuous improvement. Competitive compensation, equity, and benefits package. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. About Astera Labs Astera Labs (NASDAQ: ALAB) is a pioneering fabless semiconductor company headquartered in Silicon Valley, driving the evolution of AI and cloud infrastructure through purpose-built connectivity solutions. As a leader in rack-scale architecture, Astera Labs is enabling the shift to AI Infrastructure 2.0, where compute is optimized at the rack level to support the demands of next-generation workloads. Our portfolio includes high-performance silicon, software, and system-level solutions that address critical bottlenecks in data movement across compute, memory, and networking domains. Leveraging technologies such as PCIe®, CXL®, Ethernet, and UALink™, we deliver scalable, interoperable platforms that empower hyperscale data centers to deploy AI and cloud services with greater efficiency and flexibility. We are committed to open standards, software-defined architectures, and continuous innovation as we work to expand our product offerings and customer engagements. We foster a collaborative environment for professionals passionate about solving complex challenges and shaping the future of intelligent infrastructure. Role Overview Astera Labs is seeking a pragmatic, growth‑oriented Corporate Counsel to join our Legal team. Reporting directly to the Senior Counsel, Corporate Compliance, you will serve as a cross‑functional legal partner to multiple business divisions—including engineering, operations and supply chain, finance, and HR—on a wide range of matters spanning corporate governance, global trade controls (export/EAR, sanctions/OFAC, CFIUS/FDI), compliance program building, securities regulation, and corporate development. We do not expect you to arrive knowing every domain on day one. We value intellectual curiosity, judgment, and clear communication. If you enjoy translating complex rules intopractical guidance and building scalable processes that help teams move faster with confidence, this role is for you. Responsibilities Advise non-legal teams (e.g., finance, HR, business operations, engineering, and supply chain) on a broad range of legal issues, including export regulations governing device classification and tariff impact, subsidiary maintenance requirements, policies and practices, and corporate transactions. Coordinate with outside counsel on international subsidiary maintenance matters, including resolving non-US questions of law and managing periodic filings and local entity compliance. Issue-spot and assist with the development and coordination of policies, training, playbooks, and other resources to ensure compliance and optimize workflows. Keep abreast of legal decisions and changes in relevant laws and regulations to provide current advice. Assist with corporate transactions, including due diligence and integration planning. Collaborate with other members of the legal team on cross-functional projects and provide legal guidance on matters outside of core legal responsibilities when required. Assist with general legal matters during periods of high workload. Qualifications J.D. from an accredited law school and active membership in at least one U.S. state bar (California preferred). 2-5 years of experience in a law firm and/or corporate legal department, with a preference for in-house experience in a fast-paced, high-growth technology company. Experience with one or more of the following areas: SEC reporting, CFIUS/FDI controls, export controls (EAR), other regulatory fields, or corporate transactions. Strong business sense and judgment balancing legal compliance with business priorities. Excellent leadership skills with the ability to provide clear guidance on complex matters to non-legal audiences. Strong interpersonal skills and ability to handle sensitive matters with discretion and professionalism. Versatility and willingness to take on legal matters outside of core responsibilities when needed. Ability to collaborate effectively with multiple non-legal teams (e.g., finance, HR, business operations, engineering, and supply chain). Semiconductor/AI industry knowledge is a plus, but not a requirement. Salary range is $165,000 to $200,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.