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* Design and develop RTL for Big Data platform.  * Defines and documents RTL changes required for emulation/FPGA.  * Tests and debugs the emulation/FPGA model and collaterals.  * Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform.  *You will join a growing team of IC design engineering professionals  and have a real opportunity to have your hardware solutions embraced and  to demonstrate

General Requirements1. RFSoC Multi-Domain Platform Bring-UpResponsible for bringing up Xilinx RFSoC platforms with multi-domain (A53/R5) coherence and external memory integration, running on PetaLinux.2. Comprehensive Toolchain ExpertiseProficient in the full development toolchain, including Vivado, Vitis, and PetaLinux, with practical experience following standard operating procedures (SOPs) for development, debugging, and deployment.3. EVM Simulation and An

* Design and develop OpenCL/HLS/CUDA algorithms for HPC platform.  * Defines and documents OpenCL/HLS/CUDA algorithms required for emulation/FPGA.  * Tests and debugs the emulation/FPGA model and collaterals.  * Develops improvements to usability by digital circuit validation and debugging of failing tests on the emulation platform.  *You will join a growing team of digital IC design engineering professionals  and have a real opportunity to have your hardw

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 1 year of experience with digital logic design, computer architecture, and circuit theory. Experience in scripting language (e.g., Python, Perl) or a hardware description language (e.g., Verilog, VHDL). Preferred qualifications: Master's degree or PhD in Electrical Eng

Minimum qualifications: Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or related field, or equivalent practical experience. 5 years of experience with ML/AI frameworks and libraries (e.g., TensorFlow, PyTorch, scikit-learn). Experience with hardware description languages (e.g., Verilog, SystemVerilog, VHDL). Experience with applying ML/AI techniques. Preferred qualifications: Experie

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 5 years of experience in ASIC development with Verilog/SystemVerilog, VHDL. Experience with ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT). Experience in micro-architecture and design of subsystems. Preferred qualifications: