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数位 IC 设计工程师
Logo of VICI Holdings 威旭資訊股份有限公司.
About us: VICI Holdings' Hardware team is seeking a skilled FPGA Engineer to join our dynamic group. In this role, you will be pivotal in advancing our trading systems, contributing to the development and enhancement of cutting-edge technologies.We boast the leading software development team in Taiwan and possess FPGA design technology in parallel with wall street trading firms. This expertise enables us to build low-latency, fully automated trading systems. Our trading strategies cover stocks, futures, and derivatives, achieving a daily global trading volume in the hundreds of millions dollars.Roles/ Responsibilities:• High speed IP interface design (such as PCIE gen 3, 4 / Ethernet, DDR etc.)• In charge of FPGA design/ implementation/simulation.• Transmission protocol layer development.• Optimizing hardware for latency.• Proficiency with Xilinx design environment.
SystemVerilog
Verilog
FPGA
9万 ~ 15万 TWD / 月
需具备 5 年以上工作经验
不需负担管理责任
Logo of Cake Recruitment Consulting.
面板驅動IC或SOC設計影像處理與影像壓縮設計高速介面數位控制(如MIPI/ISP等)
Digital IC Design
SoC
Top integrator
180万 ~ 300万 TWD / 年
需具备 1 年以上工作经验
不需负担管理责任
Logo of Cake Recruitment Consulting.
1. ASIC Design or IP Integration2. Familiar with Digital front-endEDA tool.
IP Integration
IP Design
Digital IC Designer
180万 ~ 250万 TWD / 年
需具备 3 年以上工作经验
不需负担管理责任
Logo of Cake Recruitment Consulting.
工作內容 Knowledge of System Verilog, digital simulation and debug.Exposure to UVM is desired.Familiar with USB design is a plus.DV Experience: 6~10 years 薪資架構 13個月計算, RSU 另計
Digital IC
I/O
High Speed
400万 ~ 500万 TWD / 年
需具备 6 年以上工作经验
管理 1 ~ 5 人
Logo of Cake Recruitment Consulting.
1.Creating verification plans of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios. 2.Create verification environments using SystemVerilog, SystemC or UVM. 3.Identify and write all types of coverage measures for stimulus and corner-cases. 4.Debug tests with design engineers to deliver functionally correct design blocks. 5. Close coverage measures to identify verification holes and to show progress towards tape-out.
Digital IC
Design Verification
AI
300万 ~ 400万 TWD / 年
需具备 10 年以上工作经验
不需负担管理责任
Logo of Cake Recruitment Consulting.
250万 ~ 350万 TWD / 年
需具备 5 年以上工作经验
不需负担管理责任
Logo of Cake Recruitment Consulting.
1.Micro-architecture / RTL design, simulation and verification 2.Chip integration, algorithm implementation or interface design. 3.Familiar CDC, synthesis, formality and STA flow 4. Familiar with FPGA integration, synthesis and verification. 5. Familiar with USB/ High-speed IO related project design is a plus
Verification
FPGA
Nand flash
150万 ~ 250万 TWD / 年
需具备 3 年以上工作经验
不需负担管理责任
Logo of Cathay United Bank.
Main tasks - Support company’s digital adoption initiatives, to ensure that our organization is getting the most out of our digital assets. - Work closely with stakeholders throughout the organization, including product, IT, and customer service, to develop and execute a holistic strategy based on value and impact with a strong focus on User Experience. - Define and execute digital adoption strategies to improve efficiency and effectiveness of systems and processes, productivity, data integrity, process consistency, documentation and training. - Collaborate with cross functional delivery teams that design, develop, deliver, and maintain organizational platforms. - Partner with stakeholders across the company to understand individual department and organizational goals/initiatives and assess the correlated digital adoption challenges and priorities. - Develop and maintain an adoption roadmap with stages, deadlines, and goals. Key performance index The successful candidate must be creative, collaborative, and can manage multiple assignments while producing quality work under tight deadlines.
User Experience Development
Fintech
Digital platform operations
需具备 3 年以上工作经验
不需负担管理责任

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