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Logo of TSMC 台積電.
Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade.We are seeking a highly motivated and talented RD Engineer to join our team in developing advanced IC packaging technologies. This position offers an exciting opportunity to work on cutting-edge solutions, such as CoWoS (Chip-on-Wafer-on-Substrate), Fan-Out Wafer Level Packaging (FOWLP), and 3DIC (Three-Dimensional Integrated Circuits). The ideal candidate will have strong technical expertise and a passion for innovation in semiconductor packaging design and analysis.Join us in shaping the future of advanced IC packaging technologies and contributing to groundbreaking innovations in the semiconductor industry. This role provides a unique opportunity to work in a dynamic environment, solve challenging engineering problems, and make a meaningful impact on next-generation packaging solutions.Responsibilities:1. Conduct risk assessments and provide mitigation plans for IC packages through simulation and experiment, interpreting experimental data and simulation to provide insights into material selection and design improvements.2. Practice FEM and DOE in problem solving and path finding particularly on packaging. Conduct mechanical or thermal simulations using finite element analysis (FEA) techniques to evaluate and optimize packaging performance, and analyze stress, deformation, and heat dissipation characteristics to ensure reliability and efficiency of packaging designs.3. Continuously improve simulation methodology, refine material modeling, and enhance script automation capabilities.
面议
不限年资
不需负担管理责任
Logo of NESTLÉ VIỆT NAM.
MAIN PURPOSE OF JOB: - As a key person in process team supporting the project lead working through all the design, implementation and start-up phases of project, have close alignment and collaboration with multiple stakeholders through the project life cycle - The role is to deploy & develop the filling & packing line from either technical center or supplier to meet the project requirements in terms of quality, scope, timing and cost. - Deliver expertise to project in area of filling & packing operation ensuring full compliances, health and safety, product safety and environment are never compromised A DAY IN THE LIFE OF A PROJECT F&P ENGINEER 1. Filling/Packing System Design: - Support Project lead in defining the project scope, goals and deliverables that support business goals in freeze dry filling area. - Work with process user/technical center and design consultant to finalize the required system design (including URS, P&ID and TPM characteristics). - Closely work with draftsman in developing the installation designs (BIM). - Ensure system design fulfill process operation requirement per Nestlé standard. - Create and review specifications of Freeze dry processing and components. - Assure all specifications are feasible to source by connecting to suppliers and manufacturing operations. 2. Project Management: - Support Project lead to create detailed project timelines, budgets, and resource allocation plans. - Identify potential issues and implement corrective actions as necessary. - Be responsible for the overall site filling & packing installation works and monitor the progress. - Manage the day-to-day operations aspects of the project - filling & packing works and support the E&A installation. - Close coordinate with construction streams and startup streams, ensure all the installation designs are fitting to the integrating BIM design and operational requirement, deliver the first-time right installation.3. Lead and manage: - Coordinate with external installation team to ensure a safe and smooth installation execution; resolve any conflict between owner-contractors and among contractors. - Mobilize resources (internal & external) - Execute on freeze dry filling/packing installation and commissioning timely by making sure product and testing quality level is appropriate. 4. Safety and Health: - Implement site HSE protocols to ensure installation work is done is a safe manner and observe all company/governmental regulations. - Promote development of environmental-friendly and sustainable solutions.
packaging
engineering
1000 ~ 1500 USD / 月
不限年资
不需负担管理责任
Logo of Micron Technology.
As a GQ (Global Quality) Package Reliability Engineer at Micron Technology Inc., we are primarily responsible for package quality and reliability for Micron’s product lines working end to end for DRAM and HBM, provide inputs and approve phase gates, HVM monitoring and dispositions. This responsibility includes coordinating package qualification efforts for new products and when new designs, materials, or processes are introduced and providing recommendations on product release based on reliability test results. You will also be encouraged to devise reliability test plans to assess risk associated with excursions, conversions, and reliability and qualification issues. You will coordinate root cause and corrective action efforts within the GQ department for package related qualification and GCP failures and prepare reports for discussion and escalation. You will also engage in phase gate review starting from design to production release and ensure CTQ compliance and inline validation. Successful candidate for this position will have: Detailed knowledge of semiconductor component package assembly processes and challenges in particularly HBM and 3DS packages. Understanding of mechanical and material interaction effects on reliability of IC components and/or Printed Circuit Assemblies (PCB) assemblies Good understanding of the effects thermo-mechanical, thermal, mechanical, and hygroscopic swelling stresses on package reliability A proven understanding of industry standard reliability test methods, acceleration models used for life predictions, and sampling statistics preferred. Must be self-motivated, able to work independently, and detail oriented. Strong analytical problem-solving skills, excellent multi-tasking skills and the ability to interact easily with other groups. Good written and interpersonal skills, digital literacy are vital. proven understanding of the software systems employed in backend manufacturing and analytics is a plus like MAM, MES, JMP, Tableau etc.
failure analysis
quality
semiconductors
需具备 5 年以上工作经验
不需负担管理责任
Logo of 宜特科技.
【2025新鮮人專屬!宜特科技預聘計畫正式啟動】畢業即就業,搶先卡位你的未來!我們正在尋找 勇於挑戰、熱愛學習、擅長合作 的新生代菁英,與宜特 共創科技未來,站上職涯顛峰!預聘計畫限定福利 ★招募對象:2025年畢業之大學/碩士應屆畢業生★學校科系:理工科系優先錄取★期間限定:即日起至114/8/31前接獲宜特任用通知且依約定報到日如期到任者★到任獎金:專屬入職禮 15萬元到任獎金!搶先卡位,夢想起航!與宜特一起啟動職涯,挑戰巔峰,就等你來!------------------------------------------------------1. 了解顧客委案需求及問題分析處理(進案作業)2. 客戶委案異常處理3. 協助專案工程開發4. 年薪依個人表現而異,表現優異之工程師年薪可達85萬,表現優異之副工程師年薪可達75萬
3.4万 ~ 5万 TWD / 月
不限年资
不需负担管理责任
Logo of 台星科企業股份有限公司.
1. 機台/產品維護 trouble shooting2. 機台設備保養與維護3. 新產品的導入與驗證 (熟改機者佳)4. 機台規範檢視與制定 **有相關設備/製程經驗即可,不限機台種類**
3.46万 ~ 6万 TWD / 月
不限年资
不需负担管理责任

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