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Logo of 創意電子股份有限公司.
1. Design and optimize transistor level circuits (analog) for high-speed UCIe IP. 2. Work with cross functional teams to bring IP from schematics to mass production ready. 3. Support customers on designing specs, benchmarking IP, integration and debugging.
Analog IC
High Speed
UCIe
Negotiable
5 years of experience required
No management responsibility
Logo of Cake Recruitment Consulting.
工作內容 Knowledge of System Verilog, digital simulation and debug. Exposure to UVM is desired. Familiar with USB design is a plus. DV Experience: 6~10 years 薪資架構 13個月計算, RSU 另計
Design Verification
DV
Systemverilog
4M ~ 5M TWD / year
6 years of experience required
Managing 1-5 staff
Logo of 創意電子股份有限公司.
1. Design and optimize transistor level circuits (analog/mixed-signal) for high-speed SerDes IP. 2. Behavioral modeling (verilog/verilog-a/verilog-AMS) of circuit blocks and sub-systems. 3. Supervise layout. 4. Silicon bring up, characterization, and debugging. 5. Design and silicon documentation. 6. Work with cross functional teams to bring IP from schematics to mass production ready. 7. Support customers on designing
Analog IC
High Speed
die-to-die
Negotiable
3 years of experience required
No management responsibility
Logo of Cake Recruitment Consulting.
2.5M ~ 3.5M TWD / year
5 years of experience required
No management responsibility
Logo of Cake Recruitment Consulting.
1.Micro-architecture / RTL design, simulation and verification 2.Chip integration, algorithm implementation or interface design. 3.Familiar CDC, synthesis, formality and STA flow 4. Familiar with FPGA integration, synthesis and verification. 5. Familiar with USB/ High-speed IO related project design is a plus
Digital IC Designer
IC design
Memory
1.5M ~ 2.5M TWD / year
3 years of experience required
No management responsibility
Logo of Cake Recruitment Consulting.
Develop and test high-quality diagnostics for high-speed digital boards and ASICs to aid in hardware validation. Create and implement manufacturing tests for mass production validation of digital boards used in data center networking products. Handle the bring-up process for newly manufactured boards. Conduct root-cause analysis and isolate reported failures. Support the integration of new platform software and hardware features. Collaborate with the hardware engineering team to coordinate bring
Diagnostic
Diagnostic Testing
AI
Negotiable
8 years of experience required
No management responsibility
Logo of 多方科技股份有限公司.
工作職責 (Responsibilities): Build & innovate on high-speed analog/mixed-signal circuits such as PCIe/DDR/HDMI... transmitter and receiver in deep sub-micron CMOS technology for integration in SoC products. Work with digital team on specification definition Create behavior model for analog/digital evaluation Compliance test for SerDes IP
Linus
2.5M ~ 4.5M TWD / year
1 years of experience required
No management responsibility
Logo of HTC 宏達國際電子股份有限公司.
About HTC HTC built a vision of the future by combining humanity with technology to unleash our collective imagination. At HTC, we believe that VIVERSE, the combination of virtual and augmented reality, high-speed connectivity, AI, and blockchain – reachable on any device, anytime and anywhere – will transform the next decade across all industries and revolutionize social interactions worldwide. About Your Next Opportunity HTC is hiring a Creative Marketing Director to join our expanding global
Negotiable
10 years of experience required
Managing staff numbers: not specified
Logo of HTC 宏達國際電子股份有限公司.
About HTC HTC built a vision of the future by combining humanity with technology to unleash our collective imagination. At HTC, we believe that VIVERSE, the combination of virtual and augmented reality, high-speed connectivity, AI, and blockchain – reachable on any device, anytime and anywhere – will reshape the next decade in every industry and influence human beings' social lives. About Your Next Opportunity HTC is seeking a Senior Web Designer to join our growing global marketing team.
Negotiable
8 years of experience required
No management responsibility
Logo of 創意電子股份有限公司.
1. SoC/ASIC/Testchip & package architecture designs for high speed Analog/Serdes, D2D, and HBM2/3/4 integrations (Server, Networking, Wireless, AI, AR). 2. Execute SI/PI/EMC design-optimization for chip/package/system integration and electrical performance optimization, e.g., eye diagram, jitter, IR/EM, system-PI, cross-talk, and SSN/SSO. 3. Develop system integration design guidelines with SI/
SIPI
PISI
Negotiable
No requirement for relevant working experience
No management responsibility

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