Minimum qualifications: Bachelor’s degree in VLSI, Computer Engineering, or equivalent practical experience. 5 years of experience designing and drawing layout of high-speed/low power memories. 5 years of experience with layout verification activities like DRC, LVS, Latch-Up, or EMIR and Density Checks. Experience with developing memory array layout (e.g., row decoders, write drivers, assist circuits, sense amplifiers, memory control circuit) in 3nm (or equivalent) technology nodes. Preferred qu