Lead the top-level integration of analog IPs, encompassing projects related to SSD, UFS, eMMC, SD, and more. Demonstrate a solid understanding of basic analog circuit design concepts, including but not limited to LDO, DCDC, BANDGAP, Voltage Detector, PLL, ADC, etc. Assist in conducting fail sample analysis and perform IC measurements to contribute to the identification and resolution of issues. If you have a background in analog IP integration, possess a strong grasp of analog circuit design
3 years of experience required
No management responsibility