• Skills
a. Programing language: Verilog, SystemVerilog, C++, Python, Matlab
b. Design Algorithm and Architecture improving
c. RTL coding, Synthesis and STA
d. Gate Level to Post-layout simulation
e. Formal Verification
• Tools :
NC-Verilog, nWave, Verdi, Primetime
In collaboration with AUO, my master research is mainly about:
a. Improving micro-LED's performance: light extraction efficiency (LEE) , Ambient Contrast ratio (ACR), Crosstalk, etc.
b. Micro-LED secondary optical structure design applied in central information display(CID).
c. Model Verification via semiconductor proccesing.
Protocol study
• AMBA AXI, AHB, APB
• DDR3,4
• LPDDR3,4
• DFI
IP development and maintenance
• AHB controller
• customize DDR RTL PHY development
• DFI wrapper between DDR controller and DDR PHY