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Avatar of Liang An Jiang.
Liang An Jiang
主任工程師
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Liang An Jiang

主任工程師
I have a competent professional experience with around 6 Years in software development with C++, design pattern and chip removal algorithm design for machine tool applications.
Kneron
National Tsing Hua University
Hsinchu, East District, Hsinchu City, Taiwan
Taiwan

Professional Background

  • Current Status
    Employed
  • Profession
    C,C++ Developer
    ・
    Research / R&D
    ・
    System Architecture
  • Fields
    Software
    ・
    Semiconductor
  • Work Experience
    6-10 years (4-6 years relevant)
  • Management
    None
  • Skills
    C++
    C#
    C
    Matlab
    Simulink
    LabVIEW
    Maple
    Altium Designer
    AutoCAD Mechanical
    SolidWorks
    Software Development
    Control System
    Design Patterns
    svn
    Github
    Inventor
    Python
    TLM
    UML Diagram
    SystemC
    Git
    RISC-V
    Valgrind
    OOP Programming
  • Languages
    English
    ・
    Intermediate
    Chinese
    ・
    Native or Bilingual
    Japanese
    ・
    Beginner
  • Highest Level of Education
    Master

Job Search Preferences

  • Current Status
    Open to opportunities
  • Desired Job Type
    Full-time
    ・
    Interested in working remotely
  • Desired Positions
    software engineer
  • Desired Work Locations
    Kaohsiung City, Taiwan
    ・
    Tainan City, Taiwan
    ・
    Hsinchu City, Taiwan 300
  • Freelance

Work Experience

chief engineer

Kneron
・
Full-time
Mar 2024 - Present
Hsinchu County, Taiwan
1. Analyzed NPU performance through FPGA emulation and RTL waveform analysis. 2. Identified system bottlenecks and optimized overall efficiency. 3. Designed the cycle accurate CModel for assessing RISC-V instruction efficiency in NPU. 4. Implemented new features for the next generation of Kneron NPU CModel.

Chief Engineer

SiliconMotion
・
Full-time
May 2020 - Feb 2024
・
3 yrs 10 mos
Hsinchu City, Taiwan 300
1. Modularized CPU peripheral IPs and verified functions with RTL co-sim environment. 2. Designed the virtual platform to shorten developing schedule of FW team. 3. Coordinated with Architect, HW and FW teams to verify and discuss system design. 4. Optimized FW program by analyzing waveform of Verilog.

Engineer

SYNTEC TECHNOLOGY
・
Full-time
Nov 2016 - May 2020
・
3 yrs 7 mos
Hsinchu, Hsinchu City, Taiwan
1. Developed an machine tool analysis platform for troubleshooting and calibration. 2. Designed a chip removal algorithm without setting any parameter. 3. Filed a patent of chip removal algorithm. 4. Worked as a teaching assistant for C++ course and object-oriented programming. 5. Took machine learning course and received a certificate on coursera. 6. Took operating system course on NTHU OpenCourseWare.

Education

National Tsing Hua University

Master’s Degree
・
mechanical engineer
2014 - 2016
・
4.1/4.3 GPA
Activities and societies
1. Industry-academia cooperation project with Foxconn Technology Group( 2014.9 2015.9 )

National Tsing Hua University

Bachelor’s Degree
・
mechanical engineer
2010 - 2014
・
4/4.3 GPA
Activities and societies
1. Track and field varsity team 2. Badminton varsity team 3. Department badminton team 4. Participated in a TV show called "Gold Brain" 5. Outstanding student awards (Spring 2010, Fall 2010, Spring 2011, and Fall 2011)
Description
Interests: Travel, Culture exchange, Hiking, Jogging, Badminton, Learn new knowledge