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Zi CHEN

尚無簡介。
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Foxconn 鴻海精密工業
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Aston University
台北市, 台灣
台灣

精選履歷

上傳於 2026年1月26日

專業背景

  • 目前狀態
    待業中
  • 專業
    硬體工程師
    通訊 / RF 工程師
    電子工程師
  • 產業
    電子 / 電信
    硬體
  • 工作年資
    6 到 10 年 (4 到 6 年相關工作經驗)
  • 管理經歷
    我有管理 15 人以上的經驗
  • 技能
    Python
    OrCAD Capture
    VNA
    CMW500
  • 語言能力
    Chinese
    母語或雙語
    English
    專業
  • 最高學歷
    碩士

求職偏好

  • 目前狀態
    正在積極求職中
  • 預期工作模式
    全職
    對遠端工作有興趣
  • 希望獲得的職位
    RF工程師
  • 期望的工作地點
    新北市, 台灣
    台北市, 台灣
  • 接案服務
    全職接案者

工作經驗

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RF hardware engineer, supervisor

2020年6月 - 2024年7月
4 年 2 個月
深圳, 广东, 中华人民共和国
Ensured products’ cellular communication performance met requirements and complied with 3GPP specifications; Brought multiple products from early NPI stages to mass production. Team Leadership & Project Management ▪︎ Led a 16-engineer team for RFFE integration, achieving outstanding team performance in Apple IDL reviews. ▪︎ Managed resource allocation, task prioritisation, and risk management to ensure on-time milestone delivery. ▪︎ Collaborated with 8+ cross-functional teams and customers to ensure timely issue resolution. ▪︎ Successfully overcame challenges in the 4G to 5G transition within schedule, including RF modem supplier changes, testing platform migration, and integration of new NR, mmWave, and satellite modules. ▪︎ Developed automation tool that reduced RF bench testing cycle time by 25%, earning the 2022 Q2 FX NPI Innovation Award. RF Engineering ▪︎ Verified the performance of RFFE components such as filters, switches, PAs, and LNAs. ▪︎ Performed RF circuits impedance tuning and analysed S-parameters, Smith Charts to meet performance targets. ▪︎ Troubleshot board-level RF Tx/Rx issues, with NPI builds receiving >300 units for team analysis.
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SMT engineer

2018年1月 - 2020年4月
2 年 4 個月
上海市, 中华人民共和国
Led a 10-engineer team in SMT process development and optimisation to ensure feasibility for mass production. ▪︎ Designed and reviewed SMT fixtures, stencil apertures and transfer trays. ▪︎ Defined and optimised reflow profile, solder printing parameters to prevent and reduce soldering issues. ▪︎ Defined underfill patterns and review underfill strength by cross/planner-section and dye-pry. ▪︎ Developed flow charts, control plans, and standard operating procedures for SMT processes. ▪︎ Resolved the M1 chip solder open issue by optimising stencil aperture, reflow profile, and fixture skybar design, resulting in an improvement of the failure rate from 10% to under 0.01%.

學歷

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科學碩士(MS)
Engineering Management
2024 - 2025
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工學學士(BEng)
Aerospace engineering
2013 - 2017

資格認證

Level 7 Certificate in Strategic Management and Leadership Practice

Chartered Management Institute
證照編號: P05177398
發照日期 2025年12月
永久有效

職場能力評價