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Mail: [email protected] Phone: 0935759565 Location: Hsinchu, Taiwan
羅友翔 (Yu Hsiang Lo)
I have six years of experience as a CMP process engineer at TSMC, with a strong background in semiconductor processing and a solid understanding of semiconductor physics. My skills include data analysis (SQL, JMP, Python, Power BI), machine learning, and process control (SPC, DOE, PDCA, 8D). I also have experience in cross-departmental collaboration and possess excellent English communication skills, making me comfortable working in international environments.
I am currently seeking a position as a Product Engineer or Integration Engineer, where I can leverage my engineering background and experience to drive product development and improve yield.
#Diligent #Independent Thinking #Clear Logic #Cross-Departmental Communication #Project Management
Work Experience
Sr. CMP Process Engineer • Taiwan Semiconductor Manufacturing Company (TSMC)
Jul. 2021 - Mar. 2024
Responsible for 22/28nm High-k/Metal Gate FEOL CMP processing.
Productivity Improvement:
- Analyzed process bottlenecks and modified process recipes using DOE methods, resulting in a 20% increase in wafers per hour (WPH).
System Automation (Factory-level Coordinator):
- Collaborated with IT and cross-departmental teams to automate the incoming material qualification process, achieving an 80% reduction in man-power and a 75% reduction in cycle time.
New Process Introduction (Process Owner):
- Worked with R&D and integration teams to evaluate the feasibility and reliability of process projects.
Training and Knowledge Transfer:
- Trained new employees and served as a course instructor, receiving the 2022 Department Best Partner Award.
CMP Process Engineer • Taiwan Semiconductor Manufacturing Company (TSMC)
Oct. 2017 - Jul. 2021
Incoming Material Qualification:
- Managed incoming material inspection processes, successfully completing new material qualifications before shortages occurred to maintain product quality.
SPC Management:
- Established and maintained SPC charts, taking corrective actions to ensure process quality met specifications, successfully reducing the out-of-control (OOC) rate by 20%.
New Equipment Qualification:
- Successfully validated 10 new tools within one year during a period of rapid fab expansion.
Education
2014 - 2016
National Tsing Hua University, NTHU
Material Science and Engineering MS
GPA: 4.07/4.3
2010 - 2014
National Chiao Tung University, NCTU
Material Science and Engineering BS
GPA: 3.84/4.3
Professional Skills
- Semiconductor Process
- Semiconductor Physics
- DOE
- SPC
- PDCA/8D
Data Analysis
- Python
- JMP
- SQL/MySQL
- Power BI
- Machine/Deep Learning
- Orange
Material Analysis
- SEM/TEM
- XRD
- AFM
- Contact Angle
- FTIR/UV visible
Language
- English(TOEIC 975/990)
Mail: [email protected] Phone: 0935759565 Location: Hsinchu, Taiwan
羅友翔 (Yu Hsiang Lo)
I have six years of experience as a CMP process engineer at TSMC, with a strong background in semiconductor processing and a solid understanding of semiconductor physics. My skills include data analysis (SQL, JMP, Python, Power BI), machine learning, and process control (SPC, DOE, PDCA, 8D). I also have experience in cross-departmental collaboration and possess excellent English communication skills, making me comfortable working in international environments.
I am currently seeking a position as a Product Engineer or Integration Engineer, where I can leverage my engineering background and experience to drive product development and improve yield.
#Diligent #Independent Thinking #Clear Logic #Cross-Departmental Communication #Project Management
Work Experience
Sr. CMP Process Engineer • Taiwan Semiconductor Manufacturing Company (TSMC)
Jul. 2021 - Mar. 2024
Responsible for 22/28nm High-k/Metal Gate FEOL CMP processing.
Productivity Improvement:
- Analyzed process bottlenecks and modified process recipes using DOE methods, resulting in a 20% increase in wafers per hour (WPH).
System Automation (Factory-level Coordinator):
- Collaborated with IT and cross-departmental teams to automate the incoming material qualification process, achieving an 80% reduction in man-power and a 75% reduction in cycle time.
New Process Introduction (Process Owner):
- Worked with R&D and integration teams to evaluate the feasibility and reliability of process projects.
Training and Knowledge Transfer:
- Trained new employees and served as a course instructor, receiving the 2022 Department Best Partner Award.
CMP Process Engineer • Taiwan Semiconductor Manufacturing Company (TSMC)
Oct. 2017 - Jul. 2021
Incoming Material Qualification:
- Managed incoming material inspection processes, successfully completing new material qualifications before shortages occurred to maintain product quality.
SPC Management:
- Established and maintained SPC charts, taking corrective actions to ensure process quality met specifications, successfully reducing the out-of-control (OOC) rate by 20%.
New Equipment Qualification:
- Successfully validated 10 new tools within one year during a period of rapid fab expansion.
Education
2014 - 2016
National Tsing Hua University, NTHU
Material Science and Engineering MS
GPA: 4.07/4.3
2010 - 2014
National Chiao Tung University, NCTU
Material Science and Engineering BS
GPA: 3.84/4.3
Professional Skills
- Semiconductor Process
- Semiconductor Physics
- DOE
- SPC
- PDCA/8D
Data Analysis
- Python
- JMP
- SQL/MySQL
- Power BI
- Machine/Deep Learning
- Orange
Material Analysis
- SEM/TEM
- XRD
- AFM
- Contact Angle
- FTIR/UV visible
Language
- English(TOEIC 975/990)